1. Field of the Invention
This invention relates to a mask aligner, namely, a device for aligning, into a predetermined positional relation, a mask which is a negative and a wafer onto which the actual element pattern of the mask is to be printed, and thereafter for transferring the pattern of the mask onto a resist applied to the surface of the wafer.
2. Description of the Prior Art
In aligning a mask and a wafer, providing alignment patterns in opposed relationship on the mask and wafer are usually used particularly in automated alignment (auto-alignment). The alignment patterns on the surface of the mask and the surface of the wafer are provided with their positional accuracy guaranteed relative to actual element patterns such as circuits and, if the mask and wafer are aligned by the use of the alignment patterns, it will mean that they have also been aligned with respect to the actual element patterns. Usually, alignment is carried out with the alignment patterns of the mask and wafer observed at one time through an alignment observation optical system and for this reason, the alignment patterns of the mask and wafer differ in shape from each other.
Heretofore, where alignment has been completed and thereafter exposure has been applied, the actual element pattern of the mask has been transferred to the wafer and simultaneously therewith, the alignment pattern of the mask has been transferred onto the opposed alignment pattern of the wafer. Thus this alignment pattern one the wafer can not be used as the alignment pattern thereafter.
Therefore, a method has heretofore been adopted in which a number alignment patterns as necessary are provided on the wafer and these alignment patterns of the wafer are utilized sequentially during alignment steps.
This method, however, has the following disadvantages. One is that there are a number of alignment patterns and therefore the area that can be occupied by circuit patterns (actual element patterns) is decreased. Another disadvantage is that the mutual positional error of the plurality of alignment patterns reduces the alignment accuracy.
That is, where in the first step, all alignment patterns for use thereafter are made on the wafer, the error between those alignment patterns may cause deterioration of the alignment accuracy during the second and subsequent steps and, where in a certain step, the alignment pattern for use in the next step is made on the wafer, the mutual positional error between the actual element pattern of the mask used in that step and the alignment pattern prepared on the mask for the next step which is to be transferred to the wafer becomes a problem.
For the purpose of overcoming the above-noted disadvantages, means for protecting the alignment pattern on the wafer have been proposed.
One of them, as is known from U.S. Pat. No. 4,007,988, is a method whereby the alignment pattern portion of the wafer or the mask is partly masked when exposure is applied. In this case, the alignment pattern portion of the wafer is not exposed at all.
Another means, as is known from U.S. Pat. No. 3,844,655, is a method whereby excessive exposure is applied only to the alignment pattern portion prior to exposure.
In these two methods, the form differs depending on whether the photosensitive material (resist) is of the positive type or of the negative type, but in any case, as the result of the development, the alignment pattern of the mask is not printed around the alignment pattern of the wafer and, during the subsequent alignment processes, the alignment pattern of that wafer can be reused.
However, of these two methods, the former masking method has the disadvantages that a masking mechanism is required and that time is lost because a masking member is put in and out. The latter pre-exposure method has the disadvantages that a mechanism for applying the excessive exposure is required and that is lost corresponding to the exposure time therefor.